Positron BASIC Community

I am looking at this now

Jx

HI PEPE

Try this
Config_Start
    PLLDIV  = 5                            ' <-- 20 MHz crystal (table above)
    CPUDIV  = OSC1_PLL2                    ' 96 MHz PLL / 2 = 48 MHz CPU
    USBDIV  = 2                            ' USB clock from the 96 MHz PLL / 2
    FOSC    = HSPLL_HS                    ' crystal, PLL on
    FCMEN    = OFF
    IESO    = OFF
    PWRT    = On
    BOR      = On
    BORV    = 1                            ' about 4.3 V: the 18F part needs 4.2 V+ at 48 MHz
                                            ' (18LF part on 3.3 V: BORV = 2, 2.8 V - and check its max clock)
    VREGEN  = On                          ' USB 3.3 V regulator (needs VUSB cap) - harmless without USB
    WDT      = OFF                          ' no Clrwdt anywhere in mwboot
    WDTPS    = 32768
    MCLRE    = On
    LPT1OSC  = OFF
    PBADEN  = OFF                          ' PORTB digital at reset
    CCP2MX  = On
    STVREN  = On
    LVP      = OFF
    XINST    = OFF
    Debug    = OFF
    Cp0      = OFF
    CP1      = OFF
    CP2      = OFF
    CP3      = OFF                          ' not on the 2455/4455 (24 KB) - delete this line there
    CPB      = OFF
    CPD      = OFF
    WRT0    = OFF
    WRT1    = OFF
    WRT2    = OFF
    WRT3    = OFF                          ' not on the 2455/4455
    WRTC    = OFF
    WRTB    = OFF
    WRTD    = OFF
    EBTR0    = OFF
    EBTR1    = OFF
    EBTR2    = OFF
    EBTR3    = OFF                          ' not on the 2455/4455
    EBTRB    = OFF
Config_End

OKMN

Try This
Config_Start
    FEXTOSC  = OFF
    RSTOSC   = HFINTOSC_64MHZ               ' short form (the Q43 .ppi long form failed)
    CLKOUTEN = OFF
    PR1WAY   = OFF
    BBEN     = OFF
    CSWEN    = On
    FCMEN    = OFF
    FCMENP   = OFF
    FCMENS   = OFF
    MCLRE    = EXTMCLR
    PWRTS    = PWRT_64
    MVECEN   = OFF                          ' legacy vectors, as the apps use
    IVT1WAY  = OFF
    LPBOREN  = OFF
    BOREN    = SBORDIS
    BORV     = VBOR_2P45
    ZCD      = OFF
    PPS1WAY  = OFF
    STVREN   = On
    LVP      = On
    Debug    = OFF
    XINST    = OFF
    WDTCPS   = WDTCPS_31
    WDTE     = OFF                          ' no Clrwdt anywhere in mwboot
    WDTCWS   = WDTCWS_7
    WDTCCS   = SC
    SAFSZ    = SAFSZ_NONE
    WRTB     = OFF
    WRTC     = OFF
    WRTD     = OFF
    WRTSAF   = OFF
    WRTAPP   = OFF
    CPD      = OFF
    Cp       = OFF
Config_End

Pepe, Okmn

Did they work?  I don't have those devices, so I cannot fully test

In addition, please don't remove the license header.

No. It throws an error when trying to read the EEPROM after six attempts. The strange thing is that the program writes it successfully and it works if I enable "stand-alone EEPROM" and set the features to $3 instead of $23.

Hi Pepe

Was this tested in a real device or ISIS?

I ran the hex I posted in my simulator (it emulates the 18F PIC side of the bootloader, so I can test and trace both sides with a serial port bridge).
It works fine, and the EEPROM was written.  All the other bootloaders have been tested the same way: simulated first, then in a physical device. 

It probably won't work on ISIS

Pepe, did you test the hex I posted on a real device?

not yet

Ah theres the answer..  Isis cant run it fast enough, so I guess then bootloader is fine.  The upload is synchronised but if the eeprom request is not received in 200ms, 6 times it aborts the eeprom.