18F47Q84 Timer 1

[Amateurtje]

Hello All,

I arrived at the next step in my project. I got all serial communication Test files to work.

NOw I am busy with the Timer1. Theprogram does not step into the interrupt routine.. I have been trying a lot. I came to the next Code which I am pretty sure, should be very close...  It is just that it does not go into the interrrupt routine...

The LCD part works, the configuration should be oke... there are some parts for the led background light and the main current, but this all works...

Code Select Expand

Device = 18F47Q84

Declare Xtal = 40


Config_Start
  FEXTOSC = HS ;Oscillator not enabled
  RSTOSC = EXTOSC ;HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1
  CLKOUTEN = OFF ;CLKOUT function is disabled
  PR1WAY = OFF ;PRLOCKED bit can be set and cleared repeatedly
  CSWEN = OFF ;The NOSC and NDIV bits cannot be changed by user software
  JTAGEN = OFF ;Disable JTAG Boundary Scan mode, JTAG pins revert to user functions
  FCMEN = OFF ;Fail-Safe Clock Monitor disabled
  FCMENP = OFF ;FSCM timer will not set FSCMP bit or OSFIF interrupt on Primary XTAL failure
  FCMENS = OFF ;FSCM timer will not set FSCMS bit or OSFIF interrupt on Secondary XTAL failure
  MCLRE = EXTMCLR ;If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR
  PWRTS = PWRT_OFF ;PWRT is disabled
  MVECEN = OFF ;Interrupt contoller does not use vector table to prioritze interrupts
  IVT1WAY = OFF ;IVTLOCKED bit can be cleared and set repeatedly
  LPBOREN = OFF ;Low-Power BOR disabled
  BOREN = SBORDIS ;Brown-out Reset enabled , SBOREN bit is ignored
  BORV = VBOR_1P9 ;Brown-out Reset Voltage (VBOR) set to 1.9V
  ZCD = OFF ;ZCD module is disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON
  PPS1WAY = OFF ;PPSLOCKED bit can be set and cleared repeatedly (subject to the unlock sequence)
  STVREN = OFF ;Stack full/underflow will not cause Reset
  LVP = OFF ;HV on MCLR/VPP must be used for programming
  XINST = OFF ;Extended Instruction Set and Indexed Addressing Mode disabled
  WDTCPS = WDTCPS_31 ;Divider ratio 1:65536; software control of WDTPS
  WDTE = OFF ;WDT Disabled; SWDTEN is ignored
  WDTCWS = WDTCWS_7 ;window always open (100%); software control; keyed access not required
  WDTCCS = SC ;Software Control
  BBSIZE = BBSIZE_512 ;Boot Block size is 512 words
  BBEN = OFF ;Boot block disabled
  SAFEN = OFF ;SAF disabled
  WRTB = OFF ;Boot Block not Write protected
  WRTC = OFF ;Configuration registers not Write protected
  WRTD = OFF ;Data EEPROM not Write protected
  WRTSAF = OFF ;SAF not Write Protected
  WRTAPP = OFF ;Application Block not write protected
  BOOTPINSEL = RC5 ;CRC on boot output pin is RC5
  BPEN = OFF ;CRC on boot output pin disabled
  ODCON = OFF ;Pin drives both high-going and low-going signals
  Cp = OFF ;PFM and Data EEPROM code protection disabled
  BOOTSCEN = OFF ;CRC on boot will not include the boot area of program memory in its calculation
  BOOTCOE = HALT ;CRC on boot will stop device if error is detected in boot areas
  APPSCEN = OFF ;CRC on boot will not include the application area of program memory in its calculation
  SAFSCEN = OFF ;CRC on boot will not include the SAF area of program memory in its calculation
  DATASCEN = OFF ;CRC on boot will not include data EEPROM in its calculation
  CFGSCEN = OFF ;CRC on boot will not include the configuration fuses in its calculation
  COE = HALT ;CRC on boot will stop device if error is detected in non-boot areas
  BOOTPOR = OFF ;CRC on boot will not run
  BCRCPOLT = hFF ;Bits 31:24 of BCRCPOL are 0xFF
  BCRCPOLU = hFF ;Bits 23:16 of BCRCPOL are 0xFF
  BCRCPOLH = hFF ;Bits 15:8 of BCRCPOL are 0xFF
  BCRCPOLL = hFF ;Bits 7:0 of BCRCPOL are 0xFF
  BCRCSEEDT = hFF ;Bits 31:24 of BCRCSEED are 0xFF
  BCRCSEEDU = hFF ;Bits 23:16 of BCRCSEED are 0xFF
  BCRCSEEDH = hFF ;Bits 15:8 of BCRCSEED are 0xFF
  BCRCSEEDL = hFF ;Bits 7:0 of BCRCSEED are 0xFF
  BCRCEREST = hFF ;Bits 31:24 of BCRCERES are 0xFF
  BCRCERESU = hFF ;Bits 23:16 of BCRCERES are 0xFF
  BCRCERESH = hFF ;Bits 15:8 of BCRCERES are 0xFF
  BCRCERESL = hFF ;Bits 7:0 of BCRCERES are 0xFF
  CRCPOLT = hFF ;Bits 31:24 of CRCPOL are 0xFF
  CRCPOLU = hFF ;Bits 23:16 of CRCPOL are 0xFF
  CRCPOLH = hFF ;Bits 15:8 of CRCPOL are 0xFF
  CRCPOLL = hFF ;Bits 7:0 of CRCPOL are 0xFF
  CRCSEEDT = hFF ;Bits 31:24 of CRCSEED are 0xFF
  CRCSEEDU = hFF ;Bits 23:16 of CRCSEED are 0xFF
  CRCSEEDH = hFF ;Bits 15:8 of CRCSEED are 0xFF
  CRCSEEDL = hFF ;Bits 7:0 of CRCSEED are 0xFF
  CRCEREST = hFF ;Bits 31:24 of CRCERES are 0xFF
  CRCERESU = hFF ;Bits 23:16 of CRCERES are 0xFF
  CRCERESH = hFF ;Bits 15:8 of CRCERES are 0xFF
  CRCERESL = hFF ;Bits 7:0 of CRCERES are 0xFF
 
Config_End

Declare Optimiser_Level = 3
TRISA = %11110000                                 ;
TRISB = %11001111                                 ; PORTB connected to LCD
TRISC = %10010110                                 ;
TRISD = %10001010
TRISE = %00001101

Declare LCD_Lines 4                          ;TMR0
Declare LCD_DTPin  PORTA.0
Declare LCD_ENPin  PORTB.5
Declare LCD_RSPin  PORTB.4
Symbol Hoofdstroom = PORTC.0
Symbol DTA = PORTD.5     ; op 14  output
Symbol Clock=PORTD.4    ; op pin 11  output
Symbol Latch = PORTC.5    ; op pin 12  output
Symbol swAAN  = 0 
 
On_Hardware_Interrupt GoTo INTERRUPT_ROUTINE              ' WHERE TO GO ON AN INTERRUPT
Dim InterruptByte As Byte
Dim ff As Byte

Dim TIMER1REG As TMR1L.Word
Dim TMR1_VAL As Word
Symbol  TMR1_VAL_stan =  40537
TMR1_VAL = TMR1_VAL_stan

Dim TijdswTijdophoging As Dword
Symbol TMR1IF = PIR3.4
Symbol TMR1ON  = T1CON.0
Symbol TMR1IE =   PIE3.4

TMR1IE=1
TMR1ON =1
Dim GIE As INTCON0.7
GIE =1

Dim ffbit As Bit
Dim ByteIn As Byte     
Clear

DelayMS 1000
Cls
DelayMS 500
DTA = 1                                             ;A0
Clock = 1                                           ;A1
Latch = 0 
Hoofdstroom=swAAN
ffbit = 0
 

Main:
Print "HALLO"
Print At 4,4, Dec8  TijdswTijdophoging
Print At 3,4, Dec3  ffbit
GoTo Main

INTERRUPT_ROUTINE:
Context Save;   
ffbit = 1
If TMR1IF= 1 Then                                 ; TMR1 voor de stopwatch
    Clear TMR1ON                                  ' STOP TMR1
    TIMER1REG = TIMER1REG + TMR1_VAL               ' LOAD TMR1
    Set TMR1ON                                     ' START TMR1
  Inc TijdswTijdophoging
  Clear TMR1IF                             ' CLEAR TMR1 INTERRUPT FLAG
EndIf
Context Restore

anybody any idea?

[trastikata]

Hello Amateurtje,

I don't see where you set-up the timer registers, you leave them with the default reset values? Another thing is I don't see where you preload the timer register and the way you load the timer value in the ISR looks odd?

[Amateurtje]

Hi Trastikata,

Thanks for looking.
What do you mean with the timer registers:
Dim TIMER1REG As TMR1L.Word ?

This is a stopwatch script I have been using for a long time. I think it came years ago from this forum/website.

For this test I tried to get it mostly to the core. But I do not think that this would/should generate my problem?: The fact that it just does not enter the Interrupt routine.. Do you think?

[trastikata]

Take a look at the datasheet    in the chapter "Timer1 Module" which registers are pertaining to Timer1 and their default values.

The prescaler in TxCON is set to 1:1, which might be OK, but the TxCLK default value is not OK - I assume you would like to set it to Fosc/4.

The way you preset the timer in the ISR is odd, assuming TIMER1REG just overflowed, why the "TIMER1REG = TIMER1REG + TMR1_VAL" and not "TIMER1REG = TMR1_VAL". Assuming you want it to overflow after "65536 - TMR1_VAL" clocks and generate an interrupt, the initial Timer1 is not set to TMR1_VAL and will overflow after 65536 clocks.

[Amateurtje]

Take a look at the datasheet    in the chapter "Timer1 Module" which registers are pertaining to Timer1 and their default values.

The prescaler in TxCON is set to 1:1, which might be OK, but the TxCLK default value is not OK - I assume you would like to set it to Fosc/4.

I will look there but isn't that making it overflow faster or less fast?. So that would still not be the reason while it is not going into the interrrupt at all.

The way you preset the timer in the ISR is odd, assuming TIMER1REG just overflowed, why the "TIMER1REG = TIMER1REG + TMR1_VAL" and not "TIMER1REG = TMR1_VAL". Assuming you want it to overflow after "65536 - TMR1_VAL" clocks and generate an interrupt, the initial Timer1 is not set to TMR1_VAL and will overflow after 65536 clocks.

Like i said, I got it a long time ago from this side, but I always interpreted it like this: ITs own value is included while it could be that it takes a 'bit of time' to go into th einterrupt etc and in this time, the TIMER1REG can already be increased. In this way ,you make sure it counts everything included, and there is not "loss" of time... While this also works already many years with my old pic and it looked logical to me, and I always had a very good and accurate clock and stopwatch, I did not see a reason to change this basic script..

ALso, for now, I do not think this is not the reason I can not get it to go into the interrupt.... I thought I enabled all interrupt enabeling bits.

[trastikata]

Take a look at the datasheet    in the chapter "Timer1 Module" which registers are pertaining to Timer1 and their default values.

The prescaler in TxCON is set to 1:1, which might be OK, but the TxCLK default value is not OK - I assume you would like to set it to Fosc/4.

I will look there but isn't that making it overflow faster or less fast?. So that would still not be the reason while it is not going into the interrrupt at all.

TxCLK sets the clock source for Timer1,the default value is not Fosc/4 and that's what you need it to be, I assume, so your Tier1 is not counting because it has no clock source to count.

[Amateurtje]

aha, sure, I get it, not counting, not going in     

And yes, This was it!! Thanks a lot!!!

Included : T1CLK      = %00000001 and everything starts to count on my screen!

1 (more) down, 1 to go..
NOw Only getting my 2 old ccp script parts to work and I can mix it all together and my transfer is complete!

Really Thanks!!!I am going to sleep happy...