cant run internal oscillator on the PIC 18F25k22

[Yves]

Hello everyone,
I'm failing to run the 18F25k22 with the internal oscillator at 64Mhz. Checking the LED set to lit for 500 ms ,but It takes about 30 seconds to switch from on to off. I can't see where I'm going wrong. My setup is:

Device = 18F25K22
Declare Xtal = 64

While
Toggle LED
DelayMS 500
Wend



;**** Added by Fuse Configurator ****
; Use the Fuse Configurator plug-in to change these settings
   Config_Start
     FOSC = INTIO67   ;Internal oscillator block
     PLLCFG = On   ;Oscillator multiplied by 4
     PRICLKEN = Off   ;Primary clock enabled
     FCMEN = OFF   ;Fail-Safe Clock Monitor disabled
     IESO = OFF   ;Oscillator Switchover mode disabled
     PWRTEN = OFF   ;Power up timer disabled
     BOREN = SBORDIS   ;Brown-out Reset enabled in hardware only (SBOREN is disabled)
     BORV = 190   ;VBOR set to 1.90 V nominal
     WDTEN = OFF   ;Watch dog timer is always disabled. SWDTEN has no effect.
     WDTPS = 32768   ;1:32768
     CCP2MX = PORTC1   ;CCP2 input/output is multiplexed with RC1
     PBADEN = On   ;PORTB<5:0> pins are configured as analog input channels on Reset
     CCP3MX = PORTB5   ;P3A/CCP3 input/output is multiplexed with RB5
     HFOFST = On   ;HFINTOSC output and ready status are not delayed by the oscillator stable status
     T3CMX = PORTC0   ;T3CKI is on RC0
     P2BMX = PORTB5   ;P2B is on RB5
     MCLRE = EXTMCLR   ;MCLR pin enabled, RE3 input pin disabled
     STVREN = On   ;Stack full/underflow will cause Reset
     LVP = OFF   ;Single-Supply ICSP enabled if MCLRE is also 1
     XINST = OFF   ;Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
     Debug = OFF   ;Disabled
     Cp0 = OFF   ;Block 0 (000800-003FFFh) not code-protected
     CP1 = OFF   ;Block 1 (004000-007FFFh) not code-protected
     CP2 = OFF   ;Block 2 (008000-00BFFFh) not code-protected
     CP3 = OFF   ;Block 3 (00C000-00FFFFh) not code-protected
     CPB = OFF   ;Boot block (000000-0007FFh) not code-protected
     CPD = OFF   ;Data EEPROM not code-protected
     WRT0 = OFF   ;Block 0 (000800-003FFFh) not write-protected
     WRT1 = OFF   ;Block 1 (004000-007FFFh) not write-protected
     WRT2 = OFF   ;Block 2 (008000-00BFFFh) not write-protected
     WRT3 = OFF   ;Block 3 (00C000-00FFFFh) not write-protected
     WRTC = OFF   ;Configuration registers (300000-3000FFh) not write-protected
     WRTB = OFF   ;Boot Block (000000-0007FFh) not write-protected
     WRTD = OFF   ;Data EEPROM not write-protected
     EBTR0 = OFF   ;Block 0 (000800-003FFFh) not protected from table reads executed in other blocks
     EBTR1 = OFF   ;Block 1 (004000-007FFFh) not protected from table reads executed in other blocks
     EBTR2 = OFF   ;Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks
     EBTR3 = OFF   ;Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks
     EBTRB = OFF   ;Boot Block (000000-0007FFh) not protected from table reads executed in other blocks
   Config_End

;**** End of Fuse Configurator Settings ****


Yves
 

[Giuseppe MPO]

Hi, this is my basic fuse configuration to work at 64MHz with PIC18F25K22

Config_Start
   
    FOSC = INTIO67    ; Oscillator Selection bits->Internal oscillator block
    PLLCFG = OFF    ; 4X PLL Enable->Oscillator used directly
    PRICLKEN = On    ; Primary clock enable bit->Primary clock enabled
    FCMEN = OFF    ; Fail-Safe Clock Monitor Enable bit->Fail-Safe Clock Monitor disabled
    IESO = OFF    ; Internal/External Oscillator Switchover bit->Oscillator Switchover mode disabled
    PWRTEN = OFF    ; Power-up Timer Enable bit->Power up timer disabled
    BOREN = SBORDIS    ; Brown-out Reset Enable bits->Brown-out Reset enabled in hardware only (SBOREN is disabled)
    BORV = 190    ; Brown Out Reset Voltage bits->VBOR set to 1.90 V nominal
    WDTEN = OFF    ; Watchdog Timer Enable bits->Watch dog timer is always disabled. SWDTEN has no effect.
    WDTPS = 32768    ; Watchdog Timer Postscale Select bits->1:32768
    CCP2MX = PORTC1    ; CCP2 MUX bit->CCP2 input/output is multiplexed with RC1
    PBADEN = On    ; PORTB A/D Enable bit->PORTB<5:0> pins are configured as analog input channels on Reset
    CCP3MX = PORTB5    ; P3A/CCP3 Mux bit->P3A/CCP3 input/output is multiplexed with RB5
    HFOFST = On    ; HFINTOSC Fast Start-up->HFINTOSC output and ready status are not delayed by the oscillator stable status
    T3CMX = PORTC0    ; Timer3 Clock input mux bit->T3CKI is on RC0
    P2BMX = PORTB5    ; ECCP2 B output mux bit->P2B is on RB5
    MCLRE = EXTMCLR    ; MCLR Pin Enable bit->MCLR pin enabled, RE3 input pin disabled
    STVREN = On    ; Stack Full/Underflow Reset Enable bit->Stack full/underflow will cause Reset
    LVP = On    ; Single-Supply ICSP Enable bit->Single-Supply ICSP enabled if MCLRE is also 1
    XINST = OFF    ; Extended Instruction Set Enable bit->Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
    Debug = OFF    ; Background Debug->Disabled
    Cp0 = OFF    ; Code Protection Block 0->Block 0 (000800-001FFFh) not code-protected
    CP1 = OFF    ; Code Protection Block 1->Block 1 (002000-003FFFh) not code-protected
    CP2 = OFF    ; Code Protection Block 2->Block 2 (004000-005FFFh) not code-protected
    CP3 = OFF    ; Code Protection Block 3->Block 3 (006000-007FFFh) not code-protected
    CPB = OFF    ; Boot Block Code Protection bit->Boot block (000000-0007FFh) not code-protected
    CPD = OFF    ; Data EEPROM Code Protection bit->Data EEPROM not code-protected
    WRT0 = OFF    ; Write Protection Block 0->Block 0 (000800-001FFFh) not write-protected
    WRT1 = OFF    ; Write Protection Block 1->Block 1 (002000-003FFFh) not write-protected
    WRT2 = OFF    ; Write Protection Block 2->Block 2 (004000-005FFFh) not write-protected
    WRT3 = OFF    ; Write Protection Block 3->Block 3 (006000-007FFFh) not write-protected
    WRTC = OFF    ; Configuration Register Write Protection bit->Configuration registers (300000-3000FFh) not write-protected
    WRTB = OFF    ; Boot Block Write Protection bit->Boot Block (000000-0007FFh) not write-protected
    WRTD = OFF    ; Data EEPROM Write Protection bit->Data EEPROM not write-protected
    EBTR0 = OFF    ; Table Read Protection Block 0->Block 0 (000800-001FFFh) not protected from table reads executed in other blocks
    EBTR1 = OFF    ; Table Read Protection Block 1->Block 1 (002000-003FFFh) not protected from table reads executed in other blocks
    EBTR2 = OFF    ; Table Read Protection Block 2->Block 2 (004000-005FFFh) not protected from table reads executed in other blocks
    EBTR3 = OFF    ; Table Read Protection Block 3->Block 3 (006000-007FFFh) not protected from table reads executed in other blocks
    EBTRB = OFF    ; Boot Block Table Read Protection bit->Boot Block (000000-0007FFh) not protected from table reads executed in other blocks

    Config_End
   
    OSCCON =  0x70          ' Set 16MHz internal osc frequency
    OSCCON2 = 0x04        ' Select PLL as osc source
    OSCTUNE = 0x40        ' PLL is enabled

[RGV250]

Hi,
I use the Amicus18.inc file which is for the 18F25K20 so will probably not need any modification for the 18F25K22 apart from the device.
Oops, just looked and Amicus used an external osc, shows how often I looked at the board.

Bob

[Yves]

Grazie mille Giuseppe.

Regards,

Yves

[John Drew]

I use the  18xxk22intosc64.inc file to set things up. Works like a charm for 64MHz on 18F25k22.
Not sure where I got the file. Ive attached a copy.
John