Setting PLL for 18F14k22

[Fanie]

I only get 16MHz, but would like the PLL to run it at 64MHz.  Tested with the LED method, four times slower.

It's probably going to be one of the stupid settings I miss.

Code Select Expand

Device = 18F14K22           '18F14K50    ' 24FJ16MC102     '32CM5164JH00032T

Xtal = 64

Config_Start
   FOSC = IRC ; Internal RC oscillator
   'FOSC = HS      ; HS oscillator                     Neither of these makes a difference...
   PLLEN = On       ; Oscillator multiplied by 4
   PCLKEN = On     ; Primary clock is under software control     
   FCMEN = OFF      ; Fail-Safe Clock Monitor disabled         
   IESO = On        ; Oscillator Switchover mode enabled
   PWRTEN = On      ; PWRT enabled
   BOREN = Off      ; Brown-out Reset enabled and controlled by software (SBOREN is enabled)
   BORV = 30        ; VBOR set to 2.2 V nominal
   WDTEN = OFF      ; WDT is controlled by SWDTEN bit of the WDTCON register
   WDTPS = 64
   MCLRE = OFF      ; RA3 input pin enabled; MCLR disabled
   HFOFST = On      ; The system clock is held off until the HF-INTOSC is stable.
   STVREN = On      ; Stack full/underflow will cause Reset
   LVP = Off ; (Single-Supply icsp ?) Low Voltage programming disabled
   BBSIZ = OFF ; 1kW boot block size
   XINST = Off ; Instruction set extension and Indexed Addressing mode enabled
   Cp0 = On     ; Block 0 code-protected
   CP1 = On         ; Block 1 (002000-003FFFh) code-protected
   CPB = On         ; Boot block (000000-0007FFh) code-protected
   CPD = On         ; Data EEPROM code-protected
   WRT0 = OFF       ; Block 0 (000800-001FFFh) not write-protected
   WRT1 = OFF       ; Block 1 (002000-003FFFh) not write-protected
   WRTB = OFF       ; Boot block (000000-0007FFh) not write-protected
   WRTC = OFF       ; Configuration registers (300000-3000FFh) not write-protected
   WRTD = OFF       ; Data EEPROM not write-protected
   EBTR0 = OFF      ; Block 0 (000800-001FFFh) not protected from table reads executed in other blocks
   EBTR1 = OFF      ; Block 1 (002000-003FFFh) not protected from table reads executed in other blocks
   EBTRB = OFF      ; Boot block (000000-0007FFh) not protected from table reads executed in other blocks
Config_End

[trastikata]

Try this:

Code Select Expand

Device = 18F14K22
Declare Xtal = 64

Main:
    OSCCON = 0x72       'Set Internal Oscillator Frequency to 16 MHz and select Internal oscillator block
    OSCTUNE.6 = 1       'PLL enabled (for HFINTOSC 8 MHz and 16 MHz only)
End

Config_Start
   FOSC = IRC ; Internal RC oscillator
   PLLEN = On       ; Oscillator multiplied by 4
   PCLKEN = On     ; Primary clock is under software control     
   FCMEN = OFF      ; Fail-Safe Clock Monitor disabled         
   IESO = On        ; Oscillator Switchover mode enabled
   PWRTEN = On      ; PWRT enabled
   BOREN = Off      ; Brown-out Reset enabled and controlled by software (SBOREN is enabled)
   BORV = 30        ; VBOR set to 2.2 V nominal
   WDTEN = OFF      ; WDT is controlled by SWDTEN bit of the WDTCON register
   WDTPS = 64
   MCLRE = OFF      ; RA3 input pin enabled; MCLR disabled
   HFOFST = On      ; The system clock is held off until the HF-INTOSC is stable.
   STVREN = On      ; Stack full/underflow will cause Reset
   LVP = Off ; (Single-Supply icsp ?) Low Voltage programming disabled
   BBSIZ = OFF ; 1kW boot block size
   XINST = Off ; Instruction set extension and Indexed Addressing mode enabled
   Cp0 = On     ; Block 0 code-protected
   CP1 = On         ; Block 1 (002000-003FFFh) code-protected
   CPB = On         ; Boot block (000000-0007FFh) code-protected
   CPD = On         ; Data EEPROM code-protected
   WRT0 = OFF       ; Block 0 (000800-001FFFh) not write-protected
   WRT1 = OFF       ; Block 1 (002000-003FFFh) not write-protected
   WRTB = OFF       ; Boot block (000000-0007FFh) not write-protected
   WRTC = OFF       ; Configuration registers (300000-3000FFh) not write-protected
   WRTD = OFF       ; Data EEPROM not write-protected
   EBTR0 = OFF      ; Block 0 (000800-001FFFh) not protected from table reads executed in other blocks
   EBTR1 = OFF      ; Block 1 (002000-003FFFh) not protected from table reads executed in other blocks
   EBTRB = OFF      ; Boot block (000000-0007FFh) not protected from table reads executed in other blocks
Config_End


[Pepe]

demo proteus

[Fanie]

Thank you both, I tried both your codes and it's still running at 16MHz.
The 1 sec on and 1 sec off takes 4 seconds each which means the speed is 4 x slower.

[trastikata]

In the code I posted changing the configuration fuse for PLL to OFF thus by giving the PLL control to the software.

PLLEN = On to PLLEN = OFF

[Fanie]

Sorry, it makes no difference.  Still 16MHz...

I have
OSCCON2 = %00000111
OSCTUNE = %11000000             '  PLL enabled for 64MHz    Bit 6 = PLL ON   
' Config1H.4 = 1

I assume the PLLEN = On is supposed to set the Config1H.4 = 1 bit to enable the PLL ?
That is what I assume from the PPI file

The IDE does not allow me to set the Config1H.4 = 1 bit.

[Fanie]

Found the problem 

In the OSCCON register, the least two bits must be 0 and 0 to select Primary clock (determined by CONFIG1H[FOSC<3:0>]).

In the setup PLLEN = On      ; Oscillator multiplied by 4 - can be ON or OFF, makes no difference

Code Select Expand

Device = 18F14K22           '18F14K50    ' 24FJ16MC102     '32CM5164JH00032T
Xtal = 64

Config_Start
   FOSC = IRC        ; Internal RC oscillator
   'FOSC = HS      ; HS oscillator                     Neither of these makes a difference...
   PLLEN = On       ; Oscillator multiplied by 4
   PCLKEN = On     ; Primary clock is under software control    
   FCMEN = OFF      ; Fail-Safe Clock Monitor disabled        
   IESO = On        ; Oscillator Switchover mode enabled
   PWRTEN = On      ; PWRT enabled
   BOREN = Off      ; Brown-out Reset enabled and controlled by software (SBOREN is enabled)
   BORV = 30        ; VBOR set to 2.2 V nominal
   WDTEN = OFF      ; WDT is controlled by SWDTEN bit of the WDTCON register
   WDTPS = 64
   MCLRE = OFF      ; RA3 input pin enabled; MCLR disabled
   HFOFST = On      ; The system clock is held off until the HF-INTOSC is stable.
   STVREN = On      ; Stack full/underflow will cause Reset
   LVP = Off        ; (Single-Supply icsp ?) Low Voltage programming disabled
   BBSIZ = OFF        ; 1kW boot block size
   XINST = Off        ; Instruction set extension and Indexed Addressing mode enabled
   Cp0 = On            ; Block 0 code-protected
   CP1 = On         ; Block 1 (002000-003FFFh) code-protected
   CPB = On         ; Boot block (000000-0007FFh) code-protected
   CPD = On         ; Data EEPROM code-protected
   WRT0 = OFF       ; Block 0 (000800-001FFFh) not write-protected
   WRT1 = OFF       ; Block 1 (002000-003FFFh) not write-protected
   WRTB = OFF       ; Boot block (000000-0007FFh) not write-protected
   WRTC = OFF       ; Configuration registers (300000-3000FFh) not write-protected
   WRTD = OFF       ; Data EEPROM not write-protected
   EBTR0 = OFF      ; Block 0 (000800-001FFFh) not protected from table reads executed in other blocks
   EBTR1 = OFF      ; Block 1 (002000-003FFFh) not protected from table reads executed in other blocks
   EBTRB = OFF      ; Boot block (000000-0007FFh) not protected from table reads executed in other blocks
Config_End

' OSCCON = 0x72       'Set Internal Oscillator Frequency to 16 MHz and select Internal oscillator block
' OSCTUNE.6 = 1
      
TRISA = %00001000               ' Configure I/O
TRISB = %11000000
TRISC = %00001000

ADCON0 = %00011101              ' Set analogue inputs
ADCON1 = %00000000              ' AD control reg
ADCON2 = %10111000
OSCCON = %01110100             '
                                ' %0 101 1100 select internal 4 MHz clock defined by FOSC<2:0> of the CONFIG1
                                ' -111---- = 16MHz   1MHz
                                ' -110---- = 8MHz    500kHz
                                ' -101---- = 4MHz    250kHz
                                ' -100---- = 2MHz
OSCCON2 = %00000111
OSCTUNE = %11000000             '  PLL enabled for 64MHz    Bit 6 = PLL ON   


Code Select Expand

Start:
        Fout = 1
        DelayMS 1000
        Fout = 0
        DelayMS 1000
        GoTo Start
My primitive code gives a near 1 second delay on and near 1 second delay off.

The 64MHz is working.  Thank you for your efforts to save me