Simple PWM problem.

[david]

Hi All,
I'm using a 16F1824 that has 4 PWM outputs and does half bridge and full bridge drive along with anti-shoot-through delays but I can't find a way to offset one PWM output by half the period of another.  The attached picture shows the requirement needed.  Two identical pulse trains with one delayed by half a period.  Frequency is not critical but somewhere around 100kHz and duty cycle around 35%. So getting one output is no problem. Any thoughts?  Perhaps I need to use a bigger chip with programmable switchmode control that does complimentary and push-pull PWM.

Cheers,
David

[Pepe]

This is what you need ?

Code Select Expand

Device = 16F1824
Declare Xtal = 32

Declare Create_Coff On
Declare Optimiser_Level = 3
Declare Watchdog Off

OSCCON = $72

' Configuración de CCP1 y CCP2 para generar PWM desfasados 180°
TRISC.3 = 0    ' CCP1 como salida
TRISC.5 = 0    ' CCP2 como salida

CCPTMRS0 = 4

PR2 = 79  ' Período del PWM1
PR4 = 79  ' Período del PWM2
CCP1CON = 0b0001100 ' PWM en CCP1
CCPR1L = 28' 35% de ciclo útil
CCP2CON = 0b0001100 ' Activar CCP2
CCPR2L = 28 ' 35% de ciclo útil

TMR2 = 0
T2CON = 0b0000100 ' Timer2 encendido

While TMR2<32:Wend
DelayUS 110

T4CON = 0b0000100 ' Timer4 encendido
TMR4 = 0


Do

Loop

Config1 FOSC_INTOSC, WDTE_OFF, PWRTE_OFF, MCLRE_OFF, CP_OFF, CPD_OFF, BOREN_OFF, CLKOUTEN_OFF, IESO_OFF, FCMEN_OFF
Config2 WRT_OFF, PLLEN_ON, STVREN_OFF, LVP_OFF




[david]

Hello Pepe,
Many thanks for your input.
Your code snippet ran first time but I need to change a few parameters.
Frequency is around 25kHz, duty cycle about 35% and the phase offset is too long.
So I guess these two lines-
While TMR2<32:Wend
DelayUS 110
mean that this is no longer a fully background task.
I'll keep playing for a bit but I really think I need a chip with more PWM options. 
In the past I have used a 16F1782 with a PSMC module which from memory (dodgy these days) did allow programmable phase offset between two identical PWM waveforms.

Thanks again.
Cheers,
David

[Pepe]

for 25khz

Code Select Expand

Device = 16F1824
Declare Xtal = 32

Declare Create_Coff On
Declare Optimiser_Level = 3
Declare Watchdog Off
Dim desp As Byte
OSCCON = $72

' Configuración de CCP1 y CCP2 para generar PWM desfasados 180°
TRISC.3 = 0    ' CCP1 como salida
TRISC.5 = 0    ' CCP2 como salida

CCPTMRS0 = 4

PR2 = 79  ' Período del PWM1
PR4 = PR2  ' Período del PWM2

desp=(PR2/2) -1

CCP1CON = 0b0001100 ' PWM en CCP1
CCPR1L = PR2 * 35 /100         ' 35% de ciclo útil

CCP2CON = CCP1CON     ' Activar CCP2
CCPR2L = CCPR1L     ' 35% de ciclo útil

TMR2 = 0
T2CON = 0b0000101   ' Timer2 encendido

While TMR2<desp:Wend
Nop

T4CON = T2CON ' Timer4 encendido
TMR4 = 0

Do
Loop

Config1 FOSC_INTOSC, WDTE_OFF, PWRTE_OFF, MCLRE_OFF, CP_OFF, CPD_OFF, BOREN_OFF, CLKOUTEN_OFF, IESO_OFF, FCMEN_OFF
Config2 WRT_OFF, PLLEN_ON, STVREN_OFF, LVP_OFF


[david]

Wow - that was quick.
Duty cycle now 33% and phase offset looks good but frequency down to 6.25kHz.  I'm sure I can get that back up nearer 100kHz.
Many thanks for your efforts there.


Cheers,
David

Just a thought.  I don't think the PLL is enabled.......  Will change and let you know.

[Pepe]

I understood that you needed 25khz, not that it gave you 25khz, that's why if the pll x4 is activated it would give 100khz, in the simulation it works. That's why now it gives 6.25 khz that x 4 gives 25khz.

[david]

Hi Pepe,
Sorry for the confusion. Yes - I'm aiming for around 100kHz frequency and about 30-35% duty cycle which it is.
Unfortunately, I won't get much time to play with it until later this evening.
Thank you for the code and the help.

Cheers,
David

[Pepe]

test now

Code Select Expand

Device = 16F1824
Declare Xtal = 32

Declare Create_Coff On
Declare Optimiser_Level = 3
Declare Watchdog Off
Dim desp As Byte
OSCCON = $70

' Configuración de CCP1 y CCP2 para generar PWM desfasados 180°
TRISC.3 = 0    ' CCP1 como salida
TRISC.5 = 0    ' CCP2 como salida

CCPTMRS0 = 4

PR2 = 79  ' Período del PWM1
PR4 = PR2  ' Período del PWM2

desp = 27

CCP1CON = 0b0001100 ' PWM en CCP1
CCPR1L = PR2 * 35 /100         ' 35% de ciclo útil

CCP2CON = CCP1CON     ' Activar CCP2
CCPR2L = CCPR1L     ' 35% de ciclo útil

TMR2 = 0
T2CON = 0b0000100   ' Timer2 encendido

While TMR2<desp:Wend
TMR4 = 0
T4CON = T2CON ' Timer4 encendido

Do
Loop

Config1 FOSC_INTOSC, WDTE_OFF, PWRTE_OFF, MCLRE_OFF, CP_OFF, CPD_OFF, BOREN_OFF, CLKOUTEN_OFF, IESO_OFF, FCMEN_OFF
Config2 WRT_OFF, PLLEN_ON, STVREN_OFF, LVP_OFF


[david]

Hard to keep up with you...
I just tried your first code again but changed these two lines-
OSCCON=%11110000
While TMR2<30:Wend

Frequency is 100kHz, duty cycle is 35% and phase shift is spot on.  That will work fine for me but I'll try your latest update too.

Cheers,
David

[david]

OK - that last update is good but the phase shift on RC5 is a bit too long.  Will have to leave it now until this evening.

[top204]

You beat me too it Pepe, and nicely done with very efficient coding.

To use two timers for the two PWM waveforms, and delay one of the timers being enabled, so it causes the PWM waveform to start a bit later than the first.