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Strange results with left$

Started by kcsl, Mar 15, 2025, 11:09 AM

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kcsl

Been having some very strange results when using strings and have managed to distil it down to the following program:

In summary this is OK:
            rsTemp1 = Left$(rsTemp, 1)      ' THIS WORKS
            HSerOut [ rsTemp1 ] 

This causes the program to go crazy:
            HSerOut [ Left$(rsTemp, 1) ]     




    Declare Optimiser_Level = 0 
    Device 18F27Q83           
    Declare Xtal 40         
    Declare Auto_Heap_Arrays = On
    Declare Auto_Heap_Strings = On
    Declare Auto_Variable_Bank_Cross = On     


    Declare HSerout_Pin = PORTB.5
    Declare Hserial_Baud = 115200     
           
    HSerOut[ 13, 10, 13, 10]

    DEBUG_Output("****************************************>*>**********")     ' 53 chars
    DEBUG_Output("****************************************>*>*******")        ' 50 chars
    DEBUG_Output("****************************************>*>**")             ' 45 chars
    Stop


    Proc DEBUG_Output(psText As String * 130)       
        Dim rsTemp                          As String * 2
        Dim rsTemp1                         As String * 1
        Dim rnLoop                          As Byte
   
        HSerOut[ "ORIG:", Dec3 Len(psText), " ", psText, 13, 10 ]   
       
        HSerOut[ "LOOP:", Dec3 Len(psText), " " ]
       
        For rnLoop = 1 To Len(psText)
            rsTemp = Mid$(psText, rnLoop, 2)
           
            'rsTemp1 = left$(rsTemp, 1)      ' THIS WORKS
            'HSerOut [ rsTemp1 ]   
           
            HSerOut [ Left$(rsTemp, 1) ]     ' THIS DOESN'T
             
        Next rnLoop
       
        HSerOut[ 13, 10 ]
    EndProc 
   
   
   
   
   
   
' Set to External XTAL
Config_Start       
    ' CONFIG1
    FEXTOSC = HS     'HS (crystal oscillator) above 8 MHz; PFM set to high power
    RSTOSC = EXTOSC_4PLL'EXTOSC operating per FEXTOSC bits and x 4 PLL                 
    ' CONFIG2
    CLKOUTEN = OFF     'CLKOUT function is disabled       
    PR1WAY = On         'PPSLOCK Bit One-Way Set Enable Bit->PPSLOCKED Bit can be cleared And Set only once; PPS registers remain locked after one clear/set cycle
    CSWEN = On         'Writing To NOSC And NDIV is allowed
    JTAGEN = OFF
    FCMEN = On         ' Fail-Safe Clock Monitor Enable Bit->Fail-Safe Clock Monitor enabled
    FCMENP = On         ' Fail-Safe Clock Monitor -Primary Xtal Enable Bit->FSCM timer will Set FSCMP Bit And OSFIF Interrupt On Primary Xtal failure
    FCMENS = On         ' Fail-Safe Clock Monitor -Secondary Xtal Enable Bit->FSCM timer will Set FSCMS Bit And OSFIF Interrupt On Secondary Xtal failure
    ' CONFIG3
    MCLRE = EXTMCLR    
    PWRTS = PWRT_OFF 'PWRT set for 64ms
    MVECEN = Off     'Multi-vector Disable, Vector table used For interrupts
    IVT1WAY = On     'IVTLOCK Bit can be cleared And Set only once
    LPBOREN = OFF     'ULPBOR enabled
    BOREN = SBORDIS     'Brown-out Reset enabled While running, disabled in Sleep; SBOREN is ignored
    ' CONFIG4
    BORV = VBOR_2P85 'Brown-out Reset Voltage (VBOR) Set To 2.85V   
    ZCD = OFF         'ZCD disabled. ZCD can be enabled by setting the ZCDSEN Bit of ZCDCON
    PPS1WAY = On     'PPSLOCK Bit can be Set And cleared repeatedly (subject To the unlock sequence)
    STVREN = On         'Stack full/underflow will cause Reset     
    LVP = On         'Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored   
    XINST = OFF         'Extended Instruction Set And Indexed Addressing Mode disabled
    ' CONFIG5
    WDTCPS = WDTCPS_31 'Divider ratio 1:65536; software control of WDTPS
    WDTE = OFF         'WDT Disabled; SWDTEN is ignored
    ' CONFIG6
    WDTCWS = WDTCWS_7 'window always open (100%); software control; keyed access not required
    WDTCCS = SC         'Software Control
    ' CONFIG7
    BBSIZE = BBSIZE_512 'Boot Block size is 512 words
    BBEN = OFF         'Boot block disabled
    SAFEN = OFF         'SAF disabled
    ' CONFIG8
    WRTB = OFF         'Configuration registers (300000-30000Bh) not write-protected
    WRTC = OFF         'Boot Block (000000-0007FFh) not write-protected
    WRTD = OFF         'Data EEPROM not write-protected
    WRTSAF = OFF     'SAF not Write Protected       
    WRTAPP = OFF 
    ' CONFIG9
    BOOTPINSEL = RC5   
    BPEN = OFF 
    ODCON = OFF     
    ' CONFIG10
    Cp = OFF         'PFM And Data EEPROM Code protection disabled           
    ' CONFIG11
    BOOTCOE = HALT
    APPSCEN = OFF
    SAFSCEN = OFF
    DATASCEN = OFF
    CFGSCEN = OFF
    COE = HALT   
    BOOTPOR = OFF
    ' CONFIG12
    BOOTSCEN = OFF   
    ' Everything else
    CRCSEEDL = $FF
    BCRCPOLT = $FF
    BCRCPOLU = $FF
    BCRCPOLH = $FF
    BCRCPOLL = $FF
    BCRCSEEDT = $FF
    BCRCSEEDU = $FF
    BCRCSEEDH = $FF
    BCRCSEEDL = $FF
    CRCPOLT = $FF
    CRCPOLU = $FF
    CRCPOLH = $FF
    CRCPOLL = $FF
    CRCSEEDT = $FF
    CRCSEEDU = $FF
    CRCSEEDH = $FF     
Config_End           

Positron 4.0.5.7

Regards,
Joe
There's no room for optimism in software or hardware engineering.