New Files for PIC24FJ1024GB606 and PIC24FJ1024GB610 Devices.

[top204]

A very helpful user of the forum asked me if I could add the PIC24FJ1024GB606 and PIC24FJ1024GB610 devices to the Positron16 compiler, so I created some files for them this morning, and tested them with a standard program code listing.

I have attached a zip file with 'gld', 'ppi' and 'def' files for the PIC24 devices:

PIC24FJ1024GB606 and PIC24FJ1024GB610.

Unzip the attached file, which is named: "PIC24FJ1024GB606 and PIC24FJ1024GB610 Devices - 21-12-2024.zip", then copy its 'gld' folder into the compiler's 'PDS' folder, over-writing any files in the compiler's 'gld' folder that are duplicated.

The compiler's PDS folder can be found at: "C:\Program Files (x86)\ProtonIDE\PDS"

Then copy the zipped file's 'PPI' and 'Defs' folders into the compiler's "PDS\Includes\" folder, which is located at: "C:\Program Files (x86)\ProtonIDE\PDS\Includes", again, over-writing any files that are duplicated in the compiler's 'Defs' folder.

Best regards
Les

[charliecoutas]

You are a good guy Les.
Charlie

[Werwolf]

Hi Les,
Thank you very much for such great news. I have found a PCB at home with a built-in PIC24FJ1024GB606, so it will be possible to test the performance. As there were no problems when testing the PIC24FJ1024GA606, I think it will be very good.

Best Regards
Alvydas

[Werwolf]

Hello Les,
I've written a small test programme:

Code Select Expand

Device = 24FJ1024GB606

Config FSEC =       BWRP_OFF, BSS_OFF, BSEN_OFF, GWRP_OFF, GSS_OFF, CWRP_OFF, CSS_DIS, AIVTDIS_DISABLE
Config FBSLIM =     BSLIM_BSLIM
Config FOSCSEL =    FNOSC_FRC, PLLMODE_PLL96DIV3, IESO_ON
Config FOSC =       POSCMD_HS, OSCIOFCN_ON, SOSCSEL_OFF, PLLSS_PLL_PRI, IOL1WAY_ON, FCKSM_CSECME
Config FWDT =       WDTPS_PS32768, FWPSA_PR128, FWDTEN_ON, WINDIS_OFF, PS25_0, WDTCMX_WDTCLK, WDTCLK_LPRC
Config FPOR =       BOREN_ON, LPCFG_OFF, DNVPEN_ENABLE
Config FICD =       ICS_PGX1, JTAGEN_OFF, BTSWP_OFF
Config FDEVOPT1 =   ALTCMPI_DISABLE, TMPRPIN_OFF, SOSCHP_ON, ALTVREF_ALTVREFDIS
Config FBOOT =      BTMODE_SINGLE


Declare Xtal = 32
Declare Reminders = Off
Declare Warnings = On
Declare Watchdog = Off
Declare ACCESS_UPPER_64k = 1
Declare Stack_Size = 256
Declare Stack_Expand = 1
Declare Dead_Code_Remove = On
Declare Create_Coff = False
Declare Optimiser_Level = 3

$define SYSCLK 32000000

Include "GT21_Init.inc"
Include "GT21_HW.inc"


CLOCK_Initialize()
Clear
DelayMS 100


MAIN:
    ;CLOCK_Initialize()
    PIC_Init()
   
    While 1 = 1
        HL11 = ~HL11
        DelayMS 1000
   
    Wend
   
Return

Code Select Expand

$ifndef _GT21_Init_inc_
$define _GT21_Init_inc_


Dim OSCCONH_Value As Byte
Dim OSCCONL_Value As Byte


Proc CLOCK_Initialize()
    ;CPDIV 1:1; PLLEN disabled; DOZE 1:8; RCDIV PRIPLL; DOZEN disabled; ROI disabled;
    CLKDIV = $3300
    ;STOR disabled; STORPOL Interrupt when STOR is 1; STSIDL disabled; STLPOL Interrupt when STLOCK is 1; STLOCK disabled; STSRC SOSC; STEN disabled; TUN Center frequency;
    OSCTUN = $00
    ;ROEN disabled; ROSEL FOSC; ROSIDL disabled; ROSWEN disabled; ROOUT disabled; ROSLP disabled;
    REFOCONL = $00
    ;RODIV 0;
    REFOCONH = $00
    ;ROTRIM 0;
    ;REFOTRIML = 0x00;
    ;DCOTUN 0;
    DCOTUN = $00
    ;DCOFSEL 8; DCOEN disabled;
    DCOCON = $0700
    ;DIV 0;
    OSCDIV = $00
    ;TRIM 0;
    OSCFDIV = $00
    ;AD1MD enabled; T3MD enabled; T4MD enabled; T1MD enabled; U2MD enabled; T2MD enabled; U1MD enabled; SPI2MD enabled; SPI1MD enabled; T5MD enabled; I2C1MD enabled;
    PMD1 = $00
    ;OC5MD enabled; OC6MD enabled; OC7MD enabled; OC8MD enabled; OC1MD enabled; IC2MD enabled; OC2MD enabled; IC1MD enabled; OC3MD enabled; OC4MD enabled; IC6MD enabled; IC7MD enabled; IC5MD enabled; IC8MD enabled; IC4MD enabled; IC3MD enabled;
    PMD2 = $00
    ;I2C3MD enabled; PMPMD enabled; U3MD enabled; RTCCMD enabled; CMPMD enabled; CRCMD enabled; I2C2MD enabled;
    PMD3 = $00
    ;U4MD enabled; USB1MD enabled; CTMUMD enabled; REFOMD enabled; LVDMD enabled;
    PMD4 = $00
    ;IC9MD enabled; OC9MD enabled;
    PMD5 = $00
    ;SPI3MD enabled;
    PMD6 = $00
    ;DMA1MD enabled; DMA0MD enabled;
    PMD7 = $00
    ;U5MD enabled; CLC3MD enabled; CLC4MD enabled; CLC1MD enabled; CLC2MD enabled; U6MD enabled;
    PMD8 = $00
    ;CF no clock failure; NOSC PRIPLL; SOSCEN disabled; POSCEN disabled; CLKLOCK unlocked; OSWEN Switch is Complete; IOLOCK not-active;
    ;__builtin_write_OSCCONH((uint8_t) ((0x300 >> _OSCCON_NOSC_POSITION) & 0x00FF));
    ;OSCCONH_Value = (($0300 >> _OSCCON_NOSC_POSITION) & $00FF)
    Write_OSCCON($0301)
    ;__builtin_write_OSCCONL((uint8_t) ((0x300 | _OSCCON_OSWEN_MASK) & 0xFF));
    ;Wait for Clock switch to occur
    While OSCCONbits_OSWEN != 0 : Wend
    While OSCCONbits_LOCK != 1 : Wend
EndProc

Proc PIC_Init()
    LATB = $0000
    LATC = $0000
    LATD = $0000
    LATE = $0000
    LATF = $0000
    LATG = $0000
   
    ;TRISB = $00FC
    ;TRISC = $2000
    ;TRISD = $0D08
    ;TRISE = $001E
    ;TRISF = $0008
    ;TRISG = $004C
   
    TRISB = $00E4
    TRISC = $4000
    TRISD = $0037
    TRISE = $000F
    TRISF = $0018
    TRISG = $0046
   
    ;Init_DMA()
    ;Init_Debug()
    ;Init_UART1($00)
   
    ;Init_T1()
   
    DelayMS 50
EndProc

Proc Init_DMA()
    DMACONbits_DMAEN = 1
    DMACONbits_PRSSEL = 0
    DMAL = $0000
    DMAH = $FFFF
EndProc
$endif '_GT21_Init_inc
Result: if I compile for PIC24FJ1024GA606 the result is OK, but if I compile for PIC24FJ1024GB606 it is negative.
In both cases the compiled program is written to the PIC24FJ1024GB606 controller.   Surprisingly, the "GB" controller accepts the "GA" program perfectly.


When compiling "GA" the code length is 196 words and when compiling "GB" it is 168 words.

Best Regards
Alvydas

[Werwolf]

Hello Les,
In version 1.1.2.4 the problem persisted with "Device = 24FJ1024GB606" (with "Device = 24FJ1024GA606" everything is fine).

An examination of the ASM files concluded that the problem occurs when compiling the procedure "Write_OSCCON($0301)". When I specify "Device = 24FJ1024GA606" I get the correct result"

 disi #14
 mov.w #3,W0
 mov.w #257,W1
 mov.w #120,W2
 mov.w #154,W3
 mov.b W2,[W1]
 mov.b W3,[W1]
 mov.b W0,[W1]
 mov.w #1,W0
 mov.w #256,W1
 mov.w #70,W2
 mov.w #87,W3
 mov.b W2,[W1]
 mov.b W3,[W1]
 mov.b W0,[W1]

If "Device = 24FJ1024GB606" is specified, the result is false.

mov.w #769,W0
mov.w W0,OSCCON

This is not a big problem. I can wait for the next compiler addition or fix, as it works fine when described as an additional procedure.

Simple test program:

Code Select Expand

Device = 24FJ1024GB606

Config FSEC =       BWRP_OFF, BSS_OFF, BSEN_OFF, GWRP_OFF, GSS_OFF, CWRP_OFF, CSS_DIS, AIVTDIS_DISABLE
Config FBSLIM =     BSLIM_BSLIM
Config FOSCSEL =    FNOSC_FRC, PLLMODE_PLL96DIV3, IESO_ON
Config FOSC =       POSCMD_HS, OSCIOFCN_ON, SOSCSEL_OFF, PLLSS_PLL_PRI, IOL1WAY_ON, FCKSM_CSECME
Config FWDT =       WDTPS_PS32768, FWPSA_PR128, FWDTEN_ON, WINDIS_OFF, PS25_0, WDTCMX_WDTCLK, WDTCLK_LPRC
Config FPOR =       BOREN_ON, LPCFG_OFF, DNVPEN_ENABLE
Config FICD =       ICS_PGX1, JTAGEN_OFF, BTSWP_OFF
Config FDEVOPT1 =   ALTCMPI_DISABLE, TMPRPIN_OFF, SOSCHP_ON, ALTVREF_ALTVREFDIS
Config FBOOT =      BTMODE_SINGLE


Declare Xtal = 32
Declare Reminders = Off
Declare Warnings = On
Declare Watchdog = Off
Declare ACCESS_UPPER_64k = 1
Declare Stack_Size = 256
Declare Stack_Expand = 1
Declare Dead_Code_Remove = On
Declare Create_Coff = False
Declare Optimiser_Level = 3

$define SYSCLK 32000000

;Include "GT21_Init.inc"
;Include "GT21_HW.inc"

Symbol HL11 = PORTB.13

CLOCK_Initialize()
Clear
DelayMS 100


Proc PIC_Init()
    LATB = $0000
    LATC = $0000
    LATD = $0000
    LATE = $0000
    LATF = $0000
    LATG = $0000
   
    TRISB = $00E4
    TRISC = $4000
    TRISD = $0037
    TRISE = $000F
    TRISF = $0018
    TRISG = $0046
       
    DelayMS 50
EndProc

Proc CLOCK_Initialize()
    ;CPDIV 1:1; PLLEN disabled; DOZE 1:8; RCDIV PRIPLL; DOZEN disabled; ROI disabled;
    CLKDIV = $3300
    ;STOR disabled; STORPOL Interrupt when STOR is 1; STSIDL disabled; STLPOL Interrupt when STLOCK is 1; STLOCK disabled; STSRC SOSC; STEN disabled; TUN Center frequency;
    OSCTUN = $00
    ;ROEN disabled; ROSEL FOSC; ROSIDL disabled; ROSWEN disabled; ROOUT disabled; ROSLP disabled;
    REFOCONL = $00
    ;RODIV 0;
    REFOCONH = $00
    ;ROTRIM 0;
    ;REFOTRIML = 0x00;
    ;DCOTUN 0;
    DCOTUN = $00
    ;DCOFSEL 8; DCOEN disabled;
    DCOCON = $0700
    ;DIV 0;
    OSCDIV = $00
    ;TRIM 0;
    OSCFDIV = $00
    ;AD1MD enabled; T3MD enabled; T4MD enabled; T1MD enabled; U2MD enabled; T2MD enabled; U1MD enabled; SPI2MD enabled; SPI1MD enabled; T5MD enabled; I2C1MD enabled;
    PMD1 = $00
    ;OC5MD enabled; OC6MD enabled; OC7MD enabled; OC8MD enabled; OC1MD enabled; IC2MD enabled; OC2MD enabled; IC1MD enabled; OC3MD enabled; OC4MD enabled; IC6MD enabled; IC7MD enabled; IC5MD enabled; IC8MD enabled; IC4MD enabled; IC3MD enabled;
    PMD2 = $00
    ;I2C3MD enabled; PMPMD enabled; U3MD enabled; RTCCMD enabled; CMPMD enabled; CRCMD enabled; I2C2MD enabled;
    PMD3 = $00
    ;U4MD enabled; USB1MD enabled; CTMUMD enabled; REFOMD enabled; LVDMD enabled;
    PMD4 = $00
    ;IC9MD enabled; OC9MD enabled;
    PMD5 = $00
    ;SPI3MD enabled;
    PMD6 = $00
    ;DMA1MD enabled; DMA0MD enabled;
    PMD7 = $00
    ;U5MD enabled; CLC3MD enabled; CLC4MD enabled; CLC1MD enabled; CLC2MD enabled; U6MD enabled;
    PMD8 = $00
    ;CF no clock failure; NOSC PRIPLL; SOSCEN disabled; POSCEN disabled; CLKLOCK unlocked; OSWEN Switch is Complete; IOLOCK not-active;
    ;__builtin_write_OSCCONH((uint8_t) ((0x300 >> _OSCCON_NOSC_POSITION) & 0x00FF));
    ;OSCCONH_Value = (($0300 >> _OSCCON_NOSC_POSITION) & $00FF)

    Write_OSCCON($0301)
    ;Sub_Write_OSCCON()

    ;__builtin_write_OSCCONL((uint8_t) ((0x300 | _OSCCON_OSWEN_MASK) & 0xFF));
    ;Wait for Clock switch to occur
    While OSCCONbits_OSWEN != 0 : Wend
    While OSCCONbits_LOCK != 1 : Wend
EndProc

;Proc Sub_Write_OSCCON()
    ;Asm
        ;disi #14
        ;mov.w #3,W0
        ;mov.w #257,W1
        ;mov.w #120,W2
        ;mov.w #154,W3
        ;mov.b W2,[W1]
        ;mov.b W3,[W1]
        ;mov.b W0,[W1]
        ;mov.w #1,W0
        ;mov.w #256,W1
        ;mov.w #70,W2
        ;mov.w #87,W3
        ;mov.b W2,[W1]
        ;mov.b W3,[W1]
        ;mov.b W0,[W1]
    ;EndAsm
;EndSub



MAIN:
   
    PIC_Init()
   
    While 1 = 1
        HL11 = ~HL11
        DelayMS 1000
   
    Wend
   
Return
Best Regards
Alvydas

[top204]

The Write_OSCCON is a preprocessor meta-macro within the device's ".def" file. Located at: "C:\Program Files (x86)\ProtonIDE\PDS\Includes\Defs\"

For the PIC24FJ1024GB606 device, I used the standard PIC24F code:

Code Select Expand

'----------------------------------------------------------------------------------
' Write a value to the OSCCON SFR
' Input     : pValue holds the value to write to OSCCON
' Output    : None
' Notes     : None
'
$define Write_OSCCONL(pValue) OSCCON.Byte0 = pValue
$define Write_OSCCONH(pValue) OSCCON.Byte1 = pValue
$define Write_OSCCON(pValue) OSCCON = pValue

And on the 24FJ1024GA606 device, I used the code:

Code Select Expand

'----------------------------------------------------------------------------------
' Unlock the OSCCON SFR and write a new value to it
' Input     : WREG0 holds the value to write to OSCCON
' Output    : None
' Notes     : 1). Disable interrupts for the unlock and write sequence
'           : 2). Execute the unlock sequence for the OSCCON low byte, in two back-to-back instructions:
'           :       • Write $46 to OSCCON<7:0>
'           :       • Write $57 to OSCCON<7:0>
'           : 3). In the instruction immediately following the unlock sequence, write the low byte to OSCCON
'           : 4). Execute the unlock sequence for the OSCCON high byte, in two back-to-back instructions:
'           :       • Write $78 to OSCCON<15:8>
'           :       • Write $9A to OSCCON<15:8>
'           : 5). In the instruction immediately following the unlock sequence, write the high byte to OSCCON
'
$define Write_OSCCONL(pValue)   '
    Disi #7                     '
    WREG0 = pValue              '
    WREG1 = AddressOf(OSCCON.Byte0) '
    WREG2 = $46                 '
    WREG3 = $57                 '
    Mov.b W2,[W1]               '
    Mov.b W3,[W1]               '
    Mov.b W0,[W1]

$define Write_OSCCONH(pValue)   '
    Disi #7                     '
    WREG0 = pValue              '
    WREG1 = AddressOf(OSCCON.Byte1) '
    WREG2 = $78                 '
    WREG3 = $9A                 '
    Mov.b W2,[W1]               '
    Mov.b W3,[W1]               '
    Mov.b W0,[W1]

$define Write_OSCCON(pValue)    '
    Disi #14                    '
    WREG0 = pValue.Byte1        '
    WREG1 = AddressOf(OSCCON.Byte1) '
    WREG2 = $78                 '
    WREG3 = $9A                 '
    Mov.b W2,[W1]               '
    Mov.b W3,[W1]               '
    Mov.b W0,[W1]               '
    WREG0 = pValue.Byte0        '
    WREG1 = AddressOf(OSCCON.Byte0) '
    WREG2 = $46                 '
    WREG3 = $57                 '
    Mov.b W2,[W1]               '
    Mov.b W3,[W1]               '
    Mov.b W0,[W1]

So the code must need to be used for the unlocking on these devices as well.

The .def files are easy to change and add too, so use notepad or some other code editor and place the code from one, into the other.

I do not have the 24FJxxxxGB606 family of devices, so the files for them are created using the microchip data files, and not everything is detailed in them.

I, simply, cannot afford every device that is available for testing all the code.

Regards
Les

[JonW]

Les

Happy Valentine's Les, It's not a bunch of flowers or chocolates, but I have ordered you one of these development boards DM240001-3.  Shipped to your house on Monday or Tuesday.

It uses the PIM modules and ships with the following:

Explorer 16/32 main development board, PIC24FJ1024GB610 PIM (MA240023), USB A to micro-B cable and USB A to type-C cable.

AI says its compatible with the following:

PIC24F PIMs:

MA240021 (PIC24FJ256GA412)
MA240019 (PIC24FJ256GB412)
MA240014 (PIC24FJ128GA310)
MA240011 (PIC24FJ128GA204)

PIC24H/dsPIC33F PIMs:

MA330025-1 (dsPIC33FJ256GP710A)
MA240017 (PIC24HJ256GP610)

dsPIC33E PIMs:

MA330031 (dsPIC33EP512GM710)
MA330028 (dsPIC33EP256GP506)

PIC32 PIMs:

MA320002 (PIC32MX360F512L)
MA320001 (PIC32MX460F512L)
MA320003-1 (PIC32MX795F512L)
MA320013 (PIC32MK1024GPE100)
MA320012 (PIC32MZ2048EFM100)

If anyone needs these parts or others in the family verifying, users can either make you a PIM or buy one for you.

Enjoy Pal :-)

Jon

[CPR]

What a lovely gesture 

[top204]

Many thanks Jon.

It is very much appreciated.

Best regards
Les

[JonW]

What other PIMs would you need Les?

[top204]

Many thanks Jon.

Until I add new devices to the compilers, newer devices on a PIM would be a guess. :-)

Best regards and many thanks my friend.
Les

[trastikata]

... it would not be right (by me) to accept what is not required.

Hello Les,

If we have the drawings and schematic of one PIM module, we could design a custom one and adjust the SMT pinout to fit the original PIM. Chinese PCB manufacturing is practically at no cost and I can get almost any PIC as samples so we can have as many development modules with different PIC pinouts to test. Soldering 100 pin chips is not a problem.

So if you have a module or the dev board pinout schematics can you share it and we can try to engineer new modules.

[rick.curl]

Hi Trastikata- Most of the PIM spec sheets include a schematic, but I noticed that this one: ATSAME54 Motor Control PIM includes a closeup of the PCB layout. I think there is enough information here to reverse engineer it.

-Rick

[JonW]

Did it arrive Les?

[top204]

Sorry Jon... I forgot to post on the forum that it arrived this afternoon.

It looks like an excellent board and many, many thanks. :-)

[JonW]

No worries, just don't trust our postal services these days

Cheers

Jon