Cannot flash a LED on RB3 or RB5 on PIC18F27Q83

[kcsl]

I cannot flash a LED on RB3 or RB5 on the PIC 18F27Q83.

RB0, RB1, RB4 all work fine, but nothing on RB3 or RB5.
I've tried using PORTB and LATB and even tried another PIC just in case but it's exactly the same.

It's just a PIC on a breadboard with an external crystal/caps and power. Just enough to get it running and allow me to program the device.

I experimented with making sure that RB5 PPS was set to I/O but that didn't help.

Does anybody have any ideas please ?

Regards,
Joe

Code Select Expand


    Declare Optimiser_Level = 0 
    Device 18F27Q83         

    Config_Start       
        FEXTOSC = HS     'HS (crystal oscillator) above 8 MHz; PFM set to high power
        RSTOSC = EXTOSC_4PLL'EXTOSC operating per FEXTOSC bits and x 4 PLL                 
        CLKOUTEN = OFF     'CLKOUT function is disabled       
        PR1WAY = OFF     'PRLOCK Bit can be Set And cleared repeatedly
        CSWEN = On         'Writing To NOSC And NDIV is allowed
        FCMEN = OFF         'Fail-Safe Clock Monitor disabled       
        MCLRE = INTMCLR     'If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR
        PWRTS = PWRT_64     'PWRT set for 64ms
        MVECEN = Off     'Multi-vector Disable, Vector table used For interrupts
        IVT1WAY = On     'IVTLOCK Bit can be cleared And Set only once
        LPBOREN = On     'ULPBOR enabled
        BOREN = NOSLP     'Brown-out Reset enabled While running, disabled in Sleep; SBOREN is ignored
        BORV = VBOR_2P85 'Brown-out Reset Voltage (VBOR) Set To 2.85V
        ZCD = OFF         'ZCD disabled. ZCD can be enabled by setting the ZCDSEN Bit of ZCDCON
        PPS1WAY = OFF     'PPSLOCK Bit can be Set And cleared repeatedly (subject To the unlock sequence)
        STVREN = On         'Stack full/underflow will cause Reset       
        XINST = OFF         'Extended Instruction Set And Indexed Addressing Mode disabled
        WDTCPS = WDTCPS_31 'Divider ratio 1:65536; software control of WDTPS
        WDTE = OFF         'WDT Disabled; SWDTEN is ignored
        WDTCWS = WDTCWS_7 'window always open (100%); software control; keyed access not required
        WDTCCS = SC         'Software Control
        BBSIZE = BBSIZE_512 'Boot Block size is 512 words
        BBEN = OFF         'Boot block disabled
        SAFEN = OFF         'SAF disabled
        WRTAPP = OFF     'Application Block not write protected
        WRTB = OFF         'Configuration registers (300000-30000Bh) not write-protected
        WRTC = OFF         'Boot Block (000000-0007FFh) not write-protected
        WRTD = OFF         'Data EEPROM not write-protected
        WRTSAF = OFF     'SAF not Write Protected       
        Cp = OFF         'PFM And Data EEPROM Code protection disabled           
        LVP = On         'Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored   

    Config_End       

    Declare Xtal 64         ' This is the speed the PIC core will be running at once configured       

    Symbol TEST_LED2                = LATC.3


' -----------------------------------------------------------------------------------------------------------
' Configure and initialize hardware
' -----------------------------------------------------------------------------------------------------------   
    TRISB   = %11000111 ' 0 = Output, 1 = Input
    ANSELB  = %00000000 ' 0 = Digital, 1 = Analog   
    WPUB    = %00000000 ' 0 = Pull-Ups Off, 1 = On
    ODCONB  = %00000000 ' 0 = Normal, 1 = Open Drain output

    ' Configure pins for PIC hardware modules
    ' Unlock PPS
    PPSLOCK = $55
    PPSLOCK = $AA   
    PPSLOCKbits_PPSLOCKED = 0 ' Unlock sequence

    RB5PPS = $00  ' Clear PPS mapping On RB5 To revert it To default I/O   

    ' Lock PPS
    PPSLOCK = $55
    PPSLOCK = $AA   
    PPSLOCKbits_PPSLOCKED = 1   ' Lock sequence


    DelayMS 1000   

MainLoop:
    Toggle PORTB.0
    Toggle PORTB.1
    Toggle PORTB.2
    Toggle PORTB.3
    Toggle PORTB.4         
    Toggle PORTB.5
    Toggle TEST_LED2 ' Additional LED just so I know the program is running on RC3

    DelayMS 1000
    GoTo MainLoop



[kcsl]

So, a bit of an update.
I wrote a simple program in MPLAB 'C' to toggle every I/O pin, and all the pins work as expected.
(I didn't try RA6 & RA7 as I've a crystal attached), but means both the PIC's I'm using are fine.

Wrote the same program in Positron and most of the pins worked except:
RA0 (always high), RA5 (always low), RB3 (always low) & RB5 (always high)
Again, didn't try RA6 & RA7

So it looks like Positron is doing something odd, or maybe one of the config values is causing issues??
Any suggestions?

[John Lawton]

RB3 & RB5 are used for JTAG. Have you specifically disabled that in the config?

John

[Stephen Moss]

Wrote the same program in Positron and most of the pins worked except:
RA0 (always high), RA5 (always low), RB3 (always low) & RB5 (always high)
Again, didn't try RA6 & RA7

So it looks like Positron is doing something odd, or maybe one of the config values is causing issues??
Any suggestions?

Maybe the Microchip software is automatically disabling the Peripherals from the pins, did you do anything about the Peripheral Pin Select?
If not you may want to check if a peripheral is connected to any of those pins by default (and if so disconnect it) to restore normal digital I/O operation on those pins.

[kcsl]

RB3 & RB5 are used for JTAG. Have you specifically disabled that in the config?

John

That was it, thank you.
Turning that off sorted all 4 of the I/O pins.

I search the datasheet for the troublesome pins but skipped over the pin allocation tables as I assumed everything was turned off.
You learn and live.

Thanks again.

Joe

[top204]

You beat me to it Joe.

The default config fuses of the compiler, in the .ppi file, do disable the JTAG:

CONFIG JTAGEN = OFF        ; Disable JTAG Boundary Scan mode, JTAG pins revert to user functions

So if you have created your own config fuses in the program listing, make sure it is also turned off.

[trastikata]

RB3 & RB5 are used for JTAG. Have you specifically disabled that in the config?

What I find strange is the datasheet doesn't list their default function as JTAG but as basic I/O pins.

[top204]

That is probably because when JTAG is disabled in the config fuses, they are general purpose I/O lines, but this should be mentioned in the datasheet's section for JTAG, but I cannot find it in there either.

However, it does state it in the "Device Configuration" section of the datasheet, under CONFIG2:

Bit 4 – JTAGEN JTAG Boundary Scan Enable
    1. Enable JTAG Boundary Scan mode and pins
    0. Disable JTAG Boundary Scan mode, JTAG pins revert to user functions

And it shows the default to JTAG on in the header bit map table on the page. Why on earth would it default to on?

That is why I always setup "all" the config fuses, because you can never tell what silliness microchip have done with their defaults.