Interrupt and internal Eeprom

[Mapo]

Hello everyone,
I have a program that writes to eeprom, I saw that it takes about 3.5ms
to write but in this period I can get an interrupt.
Microchip recommends stopping interrupts during the writing phase of the internal EEPROM in the PIC.
Looking at the assembler generated by Positron, I don't understand if it does that automatically or
if I have to do it myself.
The same applies to writing to the flash memory?

[TimB]

From memory it does not touch the interrupt control.

I stopped turning off interrupts during an eeprom write as it takes so long. On one product I wrote to eeprom then tested it was what was supposed to be was. A controlled loop was used to try again.

[tumbleweed]

The EWRITE routine doesn't disable interrupts, but you really should.
If the special unlock sequence (55, AA, set WR bit) is interrupted then the write will fail.

You don't have to disable interrupts around the entire write sequence, just that unlock portion, but if you use the built-in command you don't have much choice.

The same applies to erasing/writing the flash memory.

[AlbertoFS]

There was a Declare directive for that. Now I don't remember it. But you can use my macros. GIE_Save/GIE_Restore.
Alberto
Change .txt for .inc

[tumbleweed]

Alberto's macros are better than what's shown in the datasheet since they only re-enable interrupts if they were enabled beforehand, but you're still forced to wait for the eeprom write to complete with interrupts disabled the entire time.

[TimB]

I know that disabling and reneging etc is the "proper" way to do it.

However this will work just as well and easier

repeat
   Ewrite baddress,[bdata]
   btemp = eread baddress
until btemp = bdata

In real use I would add a counter to prevent an infinite loop if there is an issue with the actual eeprom and move addresses to a location that does work



 



 

[Mapo]

Thanks everyone for the replies, I'll do some testing to find the best solution

[top204]

I would create a seperate set of procedures for you, but microchip have changed the way EEPROM is accessed on different device families, and on the same family, but different device. So one procedure does not fit all devices. :-(

The compiler does not disable interrupts while writing to EEPROM within its libraries, and when I did implement it in the Ewrite command, the INTCON SFR or INTCON0 SFR were not always read correctly with a single movf or movff or btfss or btfsc mnemonic for the storage of the state of the GIE bit, and the sequence did not always work so I removed it. It's one of those things that "works in the datasheet", but not always in the real world. The compiler disables interrupts as little as possible because that is something for the user to do if the interrupt is not too critical.

The advice given above is absolutely correct, but you could refine the EEPROM writes by creating a procedure that manipulates the write sequence and writes the data to EEPROM with appropriate interrupt disable/enable. It isn't difficult once the datasheet has been read.