PIC18F25Q10 fuse config help

[Maxi]

hello, I need a simple 8mhz internal osc config line for this controller
osc configuration different from 18F25K22

[TimB]

This the fuse settings for the 27Q10 and you will need the OSCCON regs setting as well This is mine for 64mhz but to get 8mhz you will need to mod OSCCON1 to $63 and OSCFRQ  = $03  (I think)

Use Fuse Configurator  to get you the right fuses settings for the 25Q10 OSCCON will probably be right
 


    '------------------------------------------------------------------------------------
    ' Setup the internal oscillator to operate at 64MHz
    ' Input     : None
    ' Output    : None
    ' Notes     : None
    ''

    Proc Osc_64MHz()
        OSCCON1 = $60               ' NOSC HFINTOSC, NDIV 1
        OSCCON3 = $00               ' CSWHOLD may proceed, SOSCPWR Low power
        OSCEN   = $00               ' MFOEN disabled, LFOEN disabled, ADOEN disabled, SOSCEN disabled, EXTOEN disabled, HFOEN disabled
        OSCFRQ  = $08               ' HFFRQ 64_MHz
        OSCTUNE = $00
    EndProc



    '-------------------------------------------------------------------------------
    '**** Added by Fuse Configurator ****
    ' Use the Fuses Tab to change these settings

    Config_Start
    FEXTOSC = OFF              'Oscillator not enable
    RSTOSC = HFINTOSC_64MHZ    'HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:
    CLKOUTEN = OFF             'CLKOUT function is disable
    CSWEN = ON                 'Writing to NOSC and NDIV is allowed
    FCMEN = ON                 'Fail-Safe Clock Monitor enable
    MCLRE = EXTMCLR            'MCLR pin (RE3) is MCL
    PWRTE = OFF                 'Power up timer is on
    LPBOREN = OFF              'Low power BOR is disable
    BOREN = SBORDIS            'Brown-out Reset enabled , SBOREN bit is ignore
    BORV = VBOR_190            'Brown-out Reset Voltage (VBOR) set to 1.90
    ZCD = OFF                  'ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCO
    PPS1WAY = ON               'PPSLOCK bit can be cleared and set only once' PPS registers remain locked after one clear/set cycl
    STVREN = ON                'Stack full/underflow will cause Rese
    XINST = OFF                'Extended Instruction Set and Indexed Addressing Mode disable
    WDTCPS = WDTCPS_31         'Divider ratio 1:65536' software control of WDTP
    WDTE = OFF                 'WDT Disable
    WDTCWS = WDTCWS_7          'window always open (100%)' software control' keyed access not require
    WDTCCS = SC                'Software Contro
    WRT0 = OFF                 'Block 0 (000800-003FFFh) not write-protecte
    WRT1 = OFF                 'Block 1 (004000-007FFFh) not write-protecte
    WRT2 = OFF                 'Block 2 (008000-00BFFFh) not write-protecte
    WRT3 = OFF                 'Block 3 (00C000-00FFFFh) not write-protecte
    WRT4 = OFF                 'Block 4 (010000-013FFFh) not write-protecte
    WRT5 = OFF                 'Block 5 (014000-017FFFh) not write-protecte
    WRT6 = OFF                 'Block 6 (018000-01BFFFh) not write-protecte
    WRT7 = OFF                 'Block 7 (01C000-01FFFFh) not write-protecte
    WRTC = OFF                 'Configuration registers (300000-30000Bh) not write-protecte
    WRTB = OFF                 'Boot Block (000000-0007FFh) not write-protecte
    WRTD = OFF                 'Data EEPROM not write-protecte
    SCANE = ON                 'Scanner module is available for use, SCANMD bit can control the modul
    LVP = ON                   'Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignore
    CP = OFF                   'UserNVM code protection disable
    CPD = OFF                  'DataNVM code protection disable
    EBTR0 = OFF                'Block 0 (000800-003FFFh) not protected from table reads executed in other block
    EBTR1 = OFF                'Block 1 (004000-007FFFh) not protected from table reads executed in other block
    EBTR2 = OFF                'Block 2 (008000-00BFFFh) not protected from table reads executed in other block
    EBTR3 = OFF                'Block 3 (00C000-00FFFFh) not protected from table reads executed in other block
    EBTR4 = OFF                'Block 4 (010000-013FFFh) not protected from table reads executed in other block
    EBTR5 = OFF                'Block 5 (014000-017FFFh) not protected from table reads executed in other block
    EBTR6 = OFF                'Block 6 (018000-01BFFFh) not protected from table reads executed in other block
    EBTR7 = OFF                'Block 7 (01C000-01FFFFh) not protected from table reads executed in other block
    EBTRB = OFF                'Boot Block (000000-0007FFh) not protected from table reads executed in other block
    Config_End

    '**** End of Fuse Configurator Settings ****
    '-------------------------------------------------------------------------------

[Stephen Moss]

To me it looks like you can either use the Fuse Configurator, in which case you would the Oscillator selection to INTIO67 (Internal Oscillator Block) and set
OSCCON = $60, Sleep mode on Sleep, IntOsc = 8MHz, Clock source is determined buy fuse configuration bits.
 
Alternatively just use OSCCON = $62 Sleep mode on Sleep, IntOsc = 8MHz, Clock source is Internal Oscillator Block. 

If either case you will also need to set...
INTCON2.4 = 0,  MFIOSEL no used and
OSCTUNE = $00

[Maxi]

thank you guys, today trying this.